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FM RF to IF Chip

Look at this tiny chip. It is a RF to IF downconverter before demodulator. Today’s chips are getting smaller and smaller. It has a build in adjustable LNA, mixer, filter. I did not get the FM demodulator since I am planning to use this chip to implement an FM receiver on software side. This FM Software Define Radio will be implemented on Virtex II FPGA!… It will be fun to see it working.

Add comment May 23rd, 2009

ADC DAC 2 MSPS Implementation

Implemented ADC DAC 2 MSPS on Virtex II Pro FPGA. This is a 10 times higher in sampling rate compare to the previous post ADC DAC. The sampling rate is 2 MSPS and can go up to 4 MSPS.

So by using System Generator and a verilog blackbox I implemented an FIR high-pass filter and the result is very clean. high_pass_filter_scope_captures

Add comment May 12th, 2009